Advanced memory interface IP solution expansion to SF3 and enablement of complete SF5A design IP portfolio with rich interface protocols

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced ​​that it has signed a multi-year agreement with Samsung Foundry to expand the availability of Cadence’s design IP portfolio on Samsung Foundry’s SF5A process technology, the latest 5nm process variant to support automotive applications. Through this agreement, joint customers can obtain a complete design IP solution from Cadence, a collaborative partner in the Samsung Advanced Foundry Ecosystem (SAFE^™), including 112/56/25/10G PHY/MAC, PCI Express^® (PCIe^®) 6.0/5.0/4.0/3.1 PHY/Controller, Universal Chiplet Interconnect Express^™ (UCIe^™) PHY/Controller, USB3.x PHY/Controller and a complete PHY and controller offering for GDDR6 and DDR5/4.

The agreement also encompasses the enablement of the latest DDR5 8400+ and GDDR7 solutions on Samsung Foundry’s advanced SF3 technology, providing a future-proof migration path for leading customers seeking a high-performance, high-bandwidth memory interface solution for designing generative AI/ML, hyperscale, and high-performance computing (HPC) applications. The Cadence^® design IP solution delivers optimal power, performance, and area (PPA) with rich feature sets to enable uncompromised differentiation, versatility, and innovation for large-scale SoC designs. In addition, Cadence provides full subsystem delivery with integrated PHY and controller IP to simplify integration, minimize risks, and enable faster time to market.

“Cadence and Samsung have been collaborating closely on Samsung EDA and IP ecosystem enablement for years. Through this new multi-year IP expansion plan, we further solidify our commitment to empowering joint customers with access to a complete design IP portfolio on SF5A technology as well as the leading DDR5 8400+ and GDDR7/6 solutions on SF3,” said Jongshin Shin, EVP of Samsung Foundry and Head of IP Ecosystem.

“Cadence is committed to expanding our IP portfolio to address our customers’ evolving design requirements,” said Rishi Chugh, vice president of product marketing in the IP Group at Cadence. “Through this collaboration with Samsung, we can deliver a rich set of high-performance IP with competitive PPA that meets the most demanding requirements for HPC, AI/ML, networking, storage, and automotive applications. Developing the latest GDDR7 IP on SF3 demonstrates our leadership in this market segment.”

Active customer engagements for these IP cores are currently underway. For more information about Cadence design IP solutions, please visit www.cadence.com/go/SFIP.

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design^™ strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2023 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. PCI Express and PCIe are registered trademarks of PCI-SIG. Chiplet Interconnect Express and UCIe are trademarks of the UCIe Consortium. All other trademarks are the property of their respective owners.

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