JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, announces the publication of JEP194: Guideline for Gate Oxide Reliability and Robustness Evaluation Procedures for Silicon Carbide Power MOSFETs, JEP195: Guideline for Evaluating Gate Switching Instability of Silicon Carbide Metal-Oxide-Semiconductor Devices for Power Electronic Conversion, and JEP192: Guidelines for Gate Charge (QG) Test Method for SiC MOSFET. The publications were developed by JEDEC’s JC-70.2 Silicon Carbide Subcommittee and are available for free download from the JEDEC website.

The three documents cover several very important topics pertaining to reliability and testing of SiC MOSFETs. JEP194 establishes procedures for evaluation of reliability of gate oxide, including time-dependent dielectric breakdown (TDDB) testing and interpretation of results. JEP195 addresses the SiC MOSFET-specific phenomenon called gate switching instability and includes test and measurement routines to evaluate parametric drift and its effect on device performance. JEP192 describes the test method for gate charge of SiC MOSFETs that takes into account unique performance attributes of SiC MOSFETs.

“JEP194 is a ground-breaking document that tackles one of the most important reliability topics – robustness of gate oxide. The document equips SiC device manufacturers and users with technically sound guidelines for evaluation and demonstration of long-term reliability of gate oxide. We believe JEP194 fills a critical need, and we are grateful to have active participation of JC-70.2 members on this subject,” noted Dr. Jeffrey Casady, Wolfspeed Power Die Product Marketing Engineering Manager, and the chair of the JC-70.2 subcommittee.

“JEDEC’s JC-70.2 committee is pleased to add JEP194, JEP195, and JEP192 to its expanding ecosystem of publications. JC-70.2 has already published seven new documents covering various aspects of reliability evaluation, testing, and specification of SiC semiconductors for power electronic conversion applications. We are supporting growth of the entire wide bandgap power semiconductor industry which is evidenced by adoption of JEDEC documents by other international standardization organizations such as IEC,” said Dr. Peter Friedrichs, Vice President SiC, Infineon Technologies, and the vice-chair of the JC-70.2 subcommittee.

About JC-70

Formed in October 2017 with twenty-three member companies, JC-70 now has over 70 member companies, which underscores industry commitment to the development of universal standards to help advance the adoption of wide bandgap (WBG) power technologies. Global multinational corporations and technology startups from the US, Europe, Middle East, and Asia are working together to bring to the industry a set of standards for reliability, testing, and parametrics of WBG power semiconductors. Committee members include industry leaders in power GaN and SiC semiconductors, as well as users of wide bandgap power devices, and test and measurement equipment suppliers. Technical experts from universities and national labs also provide input.

Interested companies worldwide are welcome to join JEDEC to participate in this important standardization effort. The next JC-70 committee meeting will be held on March 20, 2023, during Applied Power Electronics Conference in Orlando, FL. Contact Emily Desjardins (emilyd@jedec.org) for more information or visit www.jedec.org.

About JEDEC

JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing over 350 member companies work together in 100+ JEDEC committees and task groups to meet the needs of every segment of the industry, for manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for download from the JEDEC website. For more information, visit www.jedec.org.

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